1. Field of the Invention
This invention relates in general to the fabrication of semiconductor integrated circuits (ICs), and more particularly to a process for the fabrication of metal gate electrodes for metal-oxide semiconductor (MOS) transistors in semiconductor ICs.
2. Description of Related Art
A metal gate of MOS transistor is important for various semiconductor ICs due to the inherent small impedance of the gate. No additional fabrication procedure such as ion implantation is required in order to improve the electrical conductivity characteristics for metal gates under normal conditions. Tungston is one metal widely used as the material for the fabricating the metal gates of MOS transistors. The tungsten electrode for a MOS transistor metal gate is normally formed by utilizing a laser-enhanced chemical vapor deposition (CVD) procedure depositing tungsten in its plasma phase. Alternatively, physical sputtering procedure may be used. However, in procedures such as plasma- or laser-enhanced CVD and physical sputtering, it is not possible to expect full control of the settling location for all metal atoms stimulated in their plasma phase by laser irradiation. Deposition of the metal gate material in regions other than those defined for the gate structure is inevitable. Meanwhile, the deposition of other impurities in the gate electrode layer with additional energy may also degrade the expected electrical conduction characteristics of the fabricated gate structure. In other words, the electrical resistance of the fabricated gate electrode is increased as a result of the difficulty in the control over the deposition region and the deposition of impurities.
On the other hand, although fabrication procedures such as low-pressure CVD are substantially free of the problem of electrode quality degradation due to the above-mentioned disadvantageous controlling factors in laser-enhanced CVD, the deposition conditions for metals such as tungsten are considered relatively poor in the relatively lower processing temperature range. Optimized temperatures for the effective tungsten deposition should be at least higher than 350.degree. C. This contradicts the low temperature requirement of low-temperature CVD.
To further outline the invention, a conventional process for fabricating a tungsten electrode for MOS transistor in semiconductor devices is examined in the following paragraphs, with reference to the accompanying drawings FIGS. 1A-1C.
First, as is shown in FIG. 1A, a P-type silicon substrate 10 is used as the basis for the construction of the semiconductor device containing the MOS transistor to be fabricated. A procedure for local oxidation of silicon (LOCOS) is then performed to form the field oxide regions 12 that serve to isolate the MOS transistor. In between the field oxide regions 12, as is schematically shown in the cross-sectional view, a layer of silicon dioxide 14 is then formed covering the surface of the substrate 10 in the transistor active region.
Then, in FIG. 1B, a physical sputtering procedure is employed to form a tungsten layer covering the surface of both the field oxide layer 12 and the silicon dioxide layer 14. A photolithographic and etching procedure then follows to define patterning in the sputtered tungsten layer and the silicon dioxide layer, so as to form the gate electrode structure as shown in the drawing, wherein reference numeral 16 designates the tungsten gate electrode layer while 18 designates the gate oxide layer. After the formation of this gate structure, N-type impurities are then implanted into the regions of the exposed substrate 10 surrounding the gate structure. This forms the Ntype lightly-doped regions 20 as shown in FIG. 1B.
Finally, as shown in FIG. 1C, sidewall spacers 22 are formed over the surface of the gate structure covering the sidewalls of the tungsten gate electrode layer 16 and the gate oxide layer 18. These sidewall spacers 22 may then be used as shielding masks for the implementation of another impurity implantation procedure, in which relatively higher concentration of N-type impurities are implanted into the regions of the lightly-doped regions 20 exposed out of shielding by the sidewall spacers 22. As a result, source/drain diffusion regions 24 for the fabricated MOS transistor can be formed as shown in the drawing.
Up to this stage, fabrication of the MOS transistor may be considered to be generally complete. However, as indicated above, a tungsten layer for the gate electrode has to be formed in the physical sputtering procedure which was conducted at relatively lower temperature. This inevitably leads to poorer efficiency in forming the tungsten layer. As is well known by persons skilled in the art, tungsten is better sputterdeposited at a temperature higher than 350.degree. C.